--
-- VHDL Architecture Fietssimulator_lib.don_t_change.v
--
-- Created:
--          by - jcmooije.UNKNOWN (dtp7985)
--          at - 16:20:22 31-05-2010
--
-- using Mentor Graphics HDL Designer(TM) 2007.1 (Build 19)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;

ENTITY s_don_t_change IS
  PORT( 
  proto5_sel_n  : OUT    STD_LOGIC;
  apex_reload_n : OUT    std_logic;
  flash_cs_n    : OUT    std_logic;
  flash_we_n    : OUT    std_logic;
  flash_BYTE_n  : OUT    std_logic
  );
END ENTITY s_don_t_change;

--
ARCHITECTURE v OF s_don_t_change IS
BEGIN
  
  proto5_sel_n <= '0';  	
  
  flash_cs_n <= '1';
  
  flash_we_n <= '1';
  
  flash_BYTE_n <= '1';
  
  apex_reload_n <= '1';
  
  
END ARCHITECTURE v;


